Invention Grant
US07702055B2 Apparatus and method for tracing processor state from multiple clock domains 有权
用于从多个时钟域跟踪处理器状态的装置和方法

Apparatus and method for tracing processor state from multiple clock domains
Abstract:
A method of tracing processor data includes receiving a first trace stream from a first processor operating in response to a first clock and a second trace stream from a second processor operating in response to a second clock. The first trace stream is routed to a first dual-port synchronous memory in accordance with the first clock and the second trace stream is routed to a second dual-port synchronous memory in accordance with the second clock. The first trace stream and the second trace stream are delivered to a memory in accordance with a third clock.
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