Invention Grant
- Patent Title: Random number generating method and semiconductor integrated circuit device
- Patent Title (中): 随机数生成方法和半导体集成电路器件
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Application No.: US10588788Application Date: 2004-02-12
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Publication No.: US07702704B2Publication Date: 2010-04-20
- Inventor: Masaya Muranaka
- Applicant: Masaya Muranaka
- Applicant Address: JP Tokyo
- Assignee: Hitachi ULSI Systems Co., Ltd.
- Current Assignee: Hitachi ULSI Systems Co., Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Miles & Stockbridge P.C.
- International Application: PCT/JP2004/001486 WO 20040212
- International Announcement: WO2005/078573 WO 20050825
- Main IPC: G06F1/02
- IPC: G06F1/02

Abstract:
A random number generating method for an electronic device including a plurality of unit circuits each first and second logic circuits, each logic circuit having a same shape and being formed through a same fabrication process, and an amplifier circuit for forming a binary signal by amplifying a noise superposed on the differential voltage of threshold voltages of the first and the second logic circuits; and a signal variation detecting circuit for forming an output signal in response to a variation in any of a plurality of binary signals outputted from the plurality of unit circuits, wherein a plurality of binary signals outputted from the signal variation detecting circuit are combined to generate a random number.
Public/Granted literature
- US20070143384A1 Random number generating method and semiconductor integrated circuit device Public/Granted day:2007-06-21
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