An ASIC includes a receiving unit, a transmission interface, a reception interface, a buffer, and a control unit. When the receiving unit receives a second write request while the transmission interface is in process of transmitting to a transmission line a first write request and write data, the control unit causes the receiving unit to store the second write request in the buffer. When the receiving unit receives a read request while the second write request is present in the buffer, the control unit causes the receiving unit to send the read request to the transmission interface prior to the second write request.