Invention Grant
- Patent Title: Method of manufacturing wiring substrate
- Patent Title (中): 制造布线基板的方法
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Application No.: US11683714Application Date: 2007-03-08
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Publication No.: US07704799B2Publication Date: 2010-04-27
- Inventor: Hidehiro Nakamura , Tetsuya Enomoto , Toshio Yamazaki , Hiroshi Kawazoe
- Applicant: Hidehiro Nakamura , Tetsuya Enomoto , Toshio Yamazaki , Hiroshi Kawazoe
- Applicant Address: JP Tokyo
- Assignee: Hitachi Chemical Co., Ltd.
- Current Assignee: Hitachi Chemical Co., Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Greenblum & Bernstein, P.L.C.
- Priority: JP2000-52043 20000228
- Main IPC: H01L21/50
- IPC: H01L21/50
Abstract:
A wiring substrate (1) comprises an insulating base (10) with connection holes (11), buried conductors (12) provided in the connection holes (11) without reaching a rear surface of the insulating base (10), and wiring layers 14 connected to the buried conductors (12). The buried conductors (12) thicken the wiring layers (14), and can form aligning parts (110) on the rear surface of the connection holes (11) to be used for three-dimensional mounting structure. Each wiring layer (14) includes thin terminals (14A), wirings (14B) and thick electrodes (14C). Not only the terminals (14A) and wirings (14B) but also the buried conductors (12) are raised by the same manufacturing process. A semiconductor element (2) is attached to the electrodes (14C) of the wiring substrate (1).
Public/Granted literature
- US20070161228A1 WIRING SUBSTRATE AND SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING WIRING SUBSTRATE Public/Granted day:2007-07-12
Information query
IPC分类:
