Invention Grant
US07704838B2 Method for forming an independent bottom gate connection for buried interconnection including bottom gate of a planar double gate MOSFET
有权
用于形成包括平面双栅极MOSFET的底栅的埋入式互连的独立底栅极连接的方法
- Patent Title: Method for forming an independent bottom gate connection for buried interconnection including bottom gate of a planar double gate MOSFET
- Patent Title (中): 用于形成包括平面双栅极MOSFET的底栅的埋入式互连的独立底栅极连接的方法
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Application No.: US11510401Application Date: 2006-08-25
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Publication No.: US07704838B2Publication Date: 2010-04-27
- Inventor: Jay P. John , Thuy B. Dao
- Applicant: Jay P. John , Thuy B. Dao
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agency: Fortkort & Houston P.C.
- Agent John A. Fortkort
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A method is provided for making a semiconductor device, which comprises (a) providing a semiconductor structure comprising a top gate (228) and a bottom gate (240); (b) creating first, second and third openings in the semiconductor structure, wherein the first opening exposes a portion of the bottom gate; (c) filling the first, second and third openings with a conductive material, thereby forming source (258) and drain (260) regions in the second and third openings and a conductive region (253) in the first opening; and (d) forming an electrical contact (278) to the conductive region.
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