Invention Grant
- Patent Title: Programmable ESD protection structure
- Patent Title (中): 可编程ESD保护结构
-
Application No.: US11324455Application Date: 2006-01-03
-
Publication No.: US07705403B1Publication Date: 2010-04-27
- Inventor: Vladislav Vashchenko , Yuri Mirgorodski , Peter J. Hopper
- Applicant: Vladislav Vashchenko , Yuri Mirgorodski , Peter J. Hopper
- Applicant Address: US CA Santa Clara
- Assignee: National Semiconductor Corporation
- Current Assignee: National Semiconductor Corporation
- Current Assignee Address: US CA Santa Clara
- Agent Jurgen K. Vollrath
- Main IPC: H01L23/62
- IPC: H01L23/62
Abstract:
In a LVTSCR or snapback NMOS ESD structure, low voltage protection as well as higher voltage protection is provided by introducing a floating gate that capacitively couples with the control gate of the ESD structure and programming the floating gate to have different charges on it as desired.
Information query
IPC分类:
