Invention Grant
- Patent Title: Integrated circuit package
- Patent Title (中): 集成电路封装
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Application No.: US11936017Application Date: 2007-11-06
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Publication No.: US07705476B2Publication Date: 2010-04-27
- Inventor: Jaime A. Bayan , Anindya Poddar
- Applicant: Jaime A. Bayan , Anindya Poddar
- Applicant Address: US CA Santa Clara
- Assignee: National Semiconductor Corporation
- Current Assignee: National Semiconductor Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Beyer Law Group LLP
- Main IPC: H01L23/495
- IPC: H01L23/495

Abstract:
Integrated circuit (IC) packages are described. Each IC package includes a die having an exposed metallic layer deposited on its back surface. Solder joints are arranged to physically and electrically connect I/O pads on the active surface of the die with associated leads. A molding material encapsulates portions of the die, leadframe and solder joint connections while leaving the metallic layer exposed and uncovered by molding material.
Public/Granted literature
- US20090115035A1 INTEGRATED CIRCUIT PACKAGE Public/Granted day:2009-05-07
Information query
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