Invention Grant
US07705648B1 Duty cycle detector with hysteresis 有权
带滞后的占空比检测器

Duty cycle detector with hysteresis
Abstract:
A circuit for monitoring a PWM signal and providing an output indicating a condition of the PWM signal. The circuit also uses condition based hysteresis to maintain an output value at a previous state until the condition of the PWM signal has remained unchanged for a given duration. In addition, the circuitry may be used in conjunction with a switching regulator to reduce switching noise during high duty cycle operation.
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