Invention Grant
US07706185B2 Reading circuitry in memory 有权
在内存中读取电路

Reading circuitry in memory
Abstract:
A reading circuit in a memory having a first memory cell coupled to a first bit line and a second bit line and a second memory cell coupled to the second bit line and a third bit line, is provided. The reading circuitry comprises a source side sensing circuit, a drain side bias circuit, a first selection circuit and a second selection circuit. The drain side bias circuit provides a drain side bias. The first selection circuit connects the second bit line and the third bit line to the drain side bias circuit in a read operation mode. The second selection circuit connects the first bit line to the source side sensing circuit so that a source current of the first memory cell is sensed.
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