In a voltage generating circuit for a semiconductor memory device, each of a plurality of reset signal generators individually generates a reset signal in response to one of a plurality of external source voltages. The plurality of external source voltages have different voltage levels. An output voltage generator generates a plurality of output voltages by independently driving each of the plurality of external source voltages in response to a corresponding one of the plurality of reset signals. The output voltage generator outputs the plurality of output voltages through a common output terminal.