Method for producing a planar spacer, an associated bipolar transistor and an associated BiCMOS circuit arrangement. The invention relates to a method for production of a planar spacer, of an associated bipolar transistor and of an associated BiCMOS circuit arrangement, in which first and second spacer layers are formed after the formation of a sacrificial mask on a mount substrate. A first anisotropic etching process of the second spacer layer is carried out to produce auxiliary spacers. A second anisotropic etching step is then carried out, in order to produce the planar spacers, using the auxiliary spacers as an etch mask.