Invention Grant
US07710169B2 Semiconductor integrated circuit controlling output impedance and slew rate 失效
半导体集成电路控制输出阻抗和转换速率

Semiconductor integrated circuit controlling output impedance and slew rate
Abstract:
A semiconductor integrated circuit according to the invention has a plurality of output transistors connected to an output terminal through which output data is outputted, and an impedance control circuit and a slew rate control circuit. The impedance control circuit generates control signals specifying output transistors to be turned on when the output data is output, from among the plurality of output transistors. The slew rate control circuit generates, according to the control signals, drive signals driving the output transistors to be turned on, and variably sets respective delay times of the drive signals according to the control signals.
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