Invention Grant
- Patent Title: CMOS level shifter circuit design
- Patent Title (中): CMOS电平移位器电路设计
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Application No.: US12204147Application Date: 2008-09-04
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Publication No.: US07710183B2Publication Date: 2010-05-04
- Inventor: Ritu Chaba , Dongkyu Park , ChangHo Jung , Sei Seung Yoon
- Applicant: Ritu Chaba , Dongkyu Park , ChangHo Jung , Sei Seung Yoon
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agent Nicholas J. Pauley; Sam Talpalatsky; Peter Kamarchik
- Main IPC: G06G5/00
- IPC: G06G5/00

Abstract:
A level shifting circuit has a pair of assist circuits. The level shifting circuit includes an input point, an output point, a pair of cross-coupled PMOS transistors coupled to the output point, and a pair of NMOS transistors coupled between the input and output points. Each assist circuit includes a pair of PMOS transistors, one responsive to an input applied to the input point, the other responsive to the drain voltage of one of the NMOS transistors. The assist circuits temporarily weaken the cross-coupled PMOS transistors when an input changes from low to high, or from high to low. The assist circuits also transiently boost the output.
Public/Granted literature
- US20100052763A1 CMOS Level Shifter Circuit Design Public/Granted day:2010-03-04
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