There is provided a demodulator system comprising a first input to receive a first analog signal at a first rate; a second input to receive a second analog signal at the first rate; a MUX coupled to the first input and the second input to receive the first analog signal and the second analog signal, and to multiplex the first analog signal and the second analog signal to generate a multiplexed analog output; an ADC to receive the multiplexed analog output and generate a multiplexed digital output, the ADC operating at a second rate, the second rate substantially equal to the first rate multiplied by a total number of input analog signals; a DEMUX to receive the multiplexed digital output and generate a first digital output having a first bitstream and a second digital output having a second bitstream corresponding to the first analog signal and the second analog signal.