An LCD driver starts reading a digital image signal of one frame from a VRAM in response to a reproduction timing signal. A driving timing signal generator generates a driving timing signal in response to a synchronizing signal, whose phase is shifted by a delay time from the reproduction timing signal. So a phase difference corresponding to the delay time is provided between the driving timing signal and the reproduction timing signal. Synchronously with the driving timing signal, an image sensor is driven to shoot a subject and output an analog image signal of one frame. After being converted into a digital form, the image signal is written in the VRAM sequentially from the first line of one frame. The phase difference is determined so that the LCD driver starts reading the image signal sequentially from the first line, immediately after the first line is written in the VRAM.