Invention Grant
US07710781B2 Data storage and processing algorithm for placement of multi-level flash cell (MLC) VT
有权
用于放置多级闪存单元（MLC）VT的数据存储和处理算法
- Patent Title: Data storage and processing algorithm for placement of multi-level flash cell (MLC) VT
- Patent Title (中): 用于放置多级闪存单元（MLC）VT的数据存储和处理算法
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Application No.: US11861240Application Date: 2007-09-25
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Publication No.: US07710781B2Publication Date: 2010-05-04
- Inventor: Rezaul Haque , Darshak A. Udeshi , Karthi Ramamurthi , Nathan C. Chrisman , Aliasgar S. Madraswala , Kevin P. Flanagan
- Applicant: Rezaul Haque , Darshak A. Udeshi , Karthi Ramamurthi , Nathan C. Chrisman , Aliasgar S. Madraswala , Kevin P. Flanagan
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Kacvinsky LLC
- Main IPC: G11C16/06
- IPC: G11C16/06 ; G11C16/04
Abstract:
A wireless device that includes a memory device having an engine to execute a voting algorithm to average a memory cell data sensing result over time to provide a charge placement in the memory cell.
Public/Granted literature
- US20090080248A1 DATA STORAGE AND PROCESSING ALGORITHM FOR PLACEMENT OF MULTI - LEVEL FLASH CELL (MLC) VT Public/Granted day:2009-03-26
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