Invention Grant
US07711974B1 SCLK auto-detection and generation in various serial port modes 有权
SCLK自动检测和生成各种串口模式

  • Patent Title: SCLK auto-detection and generation in various serial port modes
  • Patent Title (中): SCLK自动检测和生成各种串口模式
  • Application No.: US11540443
    Application Date: 2006-09-29
  • Publication No.: US07711974B1
    Publication Date: 2010-05-04
  • Inventor: Zhong YouJieren Bian
  • Applicant: Zhong YouJieren Bian
  • Applicant Address: US TX Austin
  • Assignee: Cirrus Logic, Inc.
  • Current Assignee: Cirrus Logic, Inc.
  • Current Assignee Address: US TX Austin
  • Agent Davis Chin; Steven Lin; Gregory J. Thomas
  • Main IPC: G06F1/00
  • IPC: G06F1/00 H03M1/66
SCLK auto-detection and generation in various serial port modes
Abstract:
An apparatus and a method for clock mode determination utilizing SCLK auto-detection and generation circuitry at a serial port which has a reduced number of pin-count by eliminating the need for inputting a master input clock signal MCLK and/or a serial input clock signal SCLK. The SCLK auto-detection and generation circuitry includes a SCLK detector circuit, a serial mode detector circuit, an internal SCLK generator circuit, a multiplexer, and an edge detector circuit. The SCLK detector circuit is used to detect whether an external serial clock signal is present and to generate a selection signal. The serial mode detector is used to detect whether an incoming data signal is in a non-TDM mode or a TDM mode and to generate a mode signal.
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