Invention Grant
- Patent Title: Method for transferring self-assembled dummy pattern to substrate
- Patent Title (中): 将自组装虚拟图案转移到基板的方法
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Application No.: US11618775Application Date: 2006-12-30
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Publication No.: US07712070B2Publication Date: 2010-05-04
- Inventor: Jae In Moon
- Applicant: Jae In Moon
- Applicant Address: KR Icheon-si
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Icheon-si
- Agency: Townsend and Townsend and Crew LLP
- Priority: KR10-2006-0117158 20061124
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G03F1/00 ; G03C5/00

Abstract:
A semiconductor device fabrication method is disclosed. The method includes obtaining an inverse layout of an original circuit layout, reducing the inverse layout in size, thereby obtaining a reduced layout, obtaining a dummy pattern layout having an outline identical to an outline of the reduced layout and a given line width such that the dummy pattern layout is self-assembled to the circuit layout, and transferring the self-aligned or self-assembled dummy pattern layout and circuit layout to a semiconductor substrate.
Public/Granted literature
- US20080124906A1 METHOD FOR TRANSFERRING SELF-ASSEMBLED DUMMY PATTERN TO SUBSTRATE Public/Granted day:2008-05-29
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