Invention Grant
- Patent Title: Nonvolatile semiconductor integrated circuit devices and fabrication methods thereof
- Patent Title (中): 非易失性半导体集成电路器件及其制造方法
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Application No.: US11487834Application Date: 2006-07-17
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Publication No.: US07714378B2Publication Date: 2010-05-11
- Inventor: Tae-kyung Kim , Jeong-hyuk Choi
- Applicant: Tae-kyung Kim , Jeong-hyuk Choi
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Mills & Onello, LLP
- Priority: KR10-2005-0072799 20050809
- Main IPC: H01L29/94
- IPC: H01L29/94

Abstract:
In a method for manufacturing a semiconductor device, an oxide layer, a first polysilicon layer, and a second polysilicon layer are sequentially provided on a substrate. A first hard mask pattern is provided on the second polysilicon layer. The oxide layer, the first polysilicon layer, and the second polysilicon layer are patterned using the first hard mask pattern as a mask to form a lower gate structure including an oxide pattern, a first polysilicon pattern, and a second polysilicon pattern. The lower gate structure is etched to provide an oxidation layer on sidewalls of the lower gate structure. An insulating layer is provided on the lower gate structure including the oxidation layer. The first hard mask pattern is removed to form a first opening in the insulating layer, the first opening exposing the second polysilicon pattern. A metal pattern is formed in the first opening on the second polysilicon pattern, the second polysilicon pattern having the oxidation layer on sidewalls thereof.
Public/Granted literature
- US20070034955A1 Nonvolatile semiconductor integrated circuit devices and fabrication methods thereof Public/Granted day:2007-02-15
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