Invention Grant
- Patent Title: Phase alignment circuit for a TDC in a DPLL
- Patent Title (中): DPLL中TDC的相位对准电路
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Application No.: US12139982Application Date: 2008-06-16
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Publication No.: US07714669B2Publication Date: 2010-05-11
- Inventor: Edmund Gotz , Klaus Peter Meiser
- Applicant: Edmund Gotz , Klaus Peter Meiser
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Lee & Hayes, PLLC
- Main IPC: H03L7/191
- IPC: H03L7/191
Abstract:
The present disclosure relates to circuits and methods for accelerating a new frequency lock-in process of a digital phase-locked loop.
Public/Granted literature
- US20090309664A1 Phase Alignment Circuit for a TDC in a DPLL Public/Granted day:2009-12-17
Information query
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