Invention Grant
US07715143B2 Delta-sigma PLL using fractional divider from a multiphase ring oscillator
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Delta-sigma PLL使用来自多相环形振荡器的分数分频器
- Patent Title: Delta-sigma PLL using fractional divider from a multiphase ring oscillator
- Patent Title (中): Delta-sigma PLL使用来自多相环形振荡器的分数分频器
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Application No.: US11965777Application Date: 2007-12-28
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Publication No.: US07715143B2Publication Date: 2010-05-11
- Inventor: William Gene Bliss , Mark Chambers
- Applicant: William Gene Bliss , Mark Chambers
- Applicant Address: US CA Irvine
- Assignee: Broadcom Corporation
- Current Assignee: Broadcom Corporation
- Current Assignee Address: US CA Irvine
- Agency: Garlick Harrison & Markison
- Agent Bruce E. Garlick
- Main IPC: G11B21/04
- IPC: G11B21/04

Abstract:
A disk drive controller includes a servo system operable to associate a time stamp with an arrival of a servo wedge, a firmware loop and core PLLs in the read channel. The firmware loop is operable to determine a period between the arrival of a pair of consecutive servo wedges and produce a desired frequency of when to read/write data to disk based on the period between the arrival of a pair of consecutive servo wedges. Processing circuitry is operable to adjust a clock signal, wherein the clock signal itself is not locked to the data and produce a fine control signal for the core PLLs in the read channel. These core PLLs are operable to determine a phase and/or frequency associated with when an analog signal is sampled and/or written to disk, wherein these core PLLs comprises Fractional N Sigma Delta PLLs.
Public/Granted literature
- US20080158711A1 Delta-sigma PLL using fractional divider from a multiphase ring oscillator Public/Granted day:2008-07-03
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