Invention Grant
- Patent Title: Erasing method of non-volatile memory
- Patent Title (中): 非易失性存储器的擦除方法
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Application No.: US12269892Application Date: 2008-11-13
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Publication No.: US07715242B2Publication Date: 2010-05-11
- Inventor: Chih-Lung Hung
- Applicant: Chih-Lung Hung
- Applicant Address: TW Hsnichu
- Assignee: Episil Technologies Inc.
- Current Assignee: Episil Technologies Inc.
- Current Assignee Address: TW Hsnichu
- Agency: Jianq Chyun IP Office
- Main IPC: G11C16/00
- IPC: G11C16/00

Abstract:
An erasing method of a non-volatile memory is provided. The non-volatile memory includes a control gate disposed in a substrate, a floating gate, a gate oxide layer disposed between the floating gate and the substrate, a source region disposed in the substrate, a drain region disposed in the substrate, a first dielectric layer disposed on the floating gate, a second dielectric layer disposed on sidewalls of the floating gate, and an erase gate. The erasing method includes applying a first voltage on the control gate, applying a second voltage on the drain, applying a third voltage on the source, applying a fourth voltage on the erase gate, and applying a fifth voltage on the substrate, such that electrons are drawn from the floating gate to the erase gate to be erased.
Public/Granted literature
- US20090059679A1 ERASING METHOD OF NON-VOLATILE MEMORY Public/Granted day:2009-03-05
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