Invention Grant
- Patent Title: Semiconductor integrated circuit and method for controlling the same
- Patent Title (中): 半导体集成电路及其控制方法
-
Application No.: US11634081Application Date: 2006-12-06
-
Publication No.: US07716545B2Publication Date: 2010-05-11
- Inventor: Masaaki Shimooka
- Applicant: Masaaki Shimooka
- Applicant Address: JP Kawasaki
- Assignee: NEC Electronics Corporation
- Current Assignee: NEC Electronics Corporation
- Current Assignee Address: JP Kawasaki
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2005-354492 20051208
- Main IPC: G01R31/28
- IPC: G01R31/28

Abstract:
A semiconductor integrated circuit includes a target circuit with at least a scan chain having sub scan chains of stages to sequentially shift a test data in response to a clock signal in a scan path test mode, and each of the sub scan chains includes first flip-flops connected in series. A backup control circuit controls the target circuit and a memory such that a plurality of sub internal state data of a data indicating an internal state of the target circuit are stored as a plurality of write data in the memory in a save mode through the sub scan chains and the plurality of sub internal state data are read out from the memory as a plurality of read data and set in the sub scan chains in a restore mode.
Public/Granted literature
- US20070150780A1 Semiconductor integrated circuit and method for controlling the same Public/Granted day:2007-06-28
Information query