Invention Grant
US07718491B2 Method for making a NAND Memory device with inversion bit lines
有权
制造具有反转位线的NAND存储器件的方法
- Patent Title: Method for making a NAND Memory device with inversion bit lines
- Patent Title (中): 制造具有反转位线的NAND存储器件的方法
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Application No.: US11424789Application Date: 2006-06-16
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Publication No.: US07718491B2Publication Date: 2010-05-18
- Inventor: Chao-I Wu
- Applicant: Chao-I Wu
- Applicant Address: TW
- Assignee: Macronix International Co., Ltd.
- Current Assignee: Macronix International Co., Ltd.
- Current Assignee Address: TW
- Agency: Baker & McKenzie LLP
- Main IPC: H01L21/8247
- IPC: H01L21/8247
Abstract:
A NAND based memory device uses inversion bit lines in order to eliminate the need for implanted bit lines. As a result, the cell size can be reduced, which can provide greater densities in smaller packaging. In another aspect, a method for fabricating a NAND based memory device that uses inversion bit lines is disclosed.
Public/Granted literature
- US20070290251A1 A NAND Memory Device with Inversion Bit Lines and Methods for Making the Same Public/Granted day:2007-12-20
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