Invention Grant
US07718495B2 Methods of forming integrated circuitry, methods of forming memory circuitry, and methods of forming field effect transistors
有权
形成集成电路的方法，形成存储器电路的方法以及形成场效应晶体管的方法
- Patent Title: Methods of forming integrated circuitry, methods of forming memory circuitry, and methods of forming field effect transistors
- Patent Title (中): 形成集成电路的方法，形成存储器电路的方法以及形成场效应晶体管的方法
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Application No.: US11849813Application Date: 2007-09-04
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Publication No.: US07718495B2Publication Date: 2010-05-18
- Inventor: Kunal R. Parekh , John K. Zahurak
- Applicant: Kunal R. Parekh , John K. Zahurak
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L21/00
- IPC: H01L21/00
Abstract:
The invention includes methods of forming integrated circuitry, methods of forming memory circuitry, and methods of forming field effect transistors. In one implementation, conductive metal silicide is formed on some areas of a substrate and not on others. In one implementation, conductive metal silicide is formed on a transistor source/drain region and which is spaced from an anisotropically etched sidewall spacer proximate a gate of the transistor.
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