Invention Grant
- Patent Title: Low temperature doped silicon layer formation
- Patent Title (中): 低温掺杂硅层形成
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Application No.: US11640471Application Date: 2006-12-14
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Publication No.: US07718518B2Publication Date: 2010-05-18
- Inventor: Peter Marc Zagwijn , Theodorus Gerardus Maria Oosterlaken , Steven R. A. Van Aerde , Pamela René Fischer
- Applicant: Peter Marc Zagwijn , Theodorus Gerardus Maria Oosterlaken , Steven R. A. Van Aerde , Pamela René Fischer
- Applicant Address: NL
- Assignee: ASM International N.V.
- Current Assignee: ASM International N.V.
- Current Assignee Address: NL
- Agency: Knobbe, Martens, Olson & Bear LLP
- Main IPC: H01L21/20
- IPC: H01L21/20

Abstract:
A doped silicon layer is formed in a batch process chamber at low temperatures. The silicon precursor for the silicon layer formation is a polysilane, such as trisilane, and the dopant precursor is an n-type dopant, such as phosphine. The silicon precursor can be flowed into the process chamber with the flow of the dopant precursor or separately from the flow of the dopant precursor. Surprisingly, deposition rate is independent of dopant precursor flow, while dopant incorporation linearly increases with the dopant precursor flow.
Public/Granted literature
- US20070141812A1 Low temperature doped silicon layer formation Public/Granted day:2007-06-21
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