Invention Grant
US07719342B2 Input latch circuit having fuses for adjusting a setup and hold time
失效
具有用于调整建立和保持时间的保险丝的输入锁存电路
- Patent Title: Input latch circuit having fuses for adjusting a setup and hold time
- Patent Title (中): 具有用于调整建立和保持时间的保险丝的输入锁存电路
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Application No.: US12164271Application Date: 2008-06-30
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Publication No.: US07719342B2Publication Date: 2010-05-18
- Inventor: Hoe Gwon Jeong
- Applicant: Hoe Gwon Jeong
- Applicant Address: KR Kyoungki-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Kyoungki-do
- Agency: Ladas & Parry LLP
- Priority: KR10-2008-0023562 20080313
- Main IPC: H01H37/76
- IPC: H01H37/76
Abstract:
An input latch circuit of a semiconductor device includes a setup time adjusting unit configured to selectively delay a clock signal and a hold time adjusting unit configured to selectively delay an input signal. The input latch circuit also includes a latch unit configured to latch an output signal of the hold time adjusting unit according to an output signal of the setup time adjusting unit. The input latch circuit changes and delays the clock signal and the input signal by cutting a fuse within the setup time adjusting unit and the hold time adjusting unit without requiring a change to a circuit in order to adjust a setup time and a hold time.
Public/Granted literature
- US20090231010A1 INPUT LATCH CIRCUIT HAVING FUSES FOR ADJUSTING A SETUP AND HOLD TIME Public/Granted day:2009-09-17
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