Invention Grant
- Patent Title: Reference buffer circuits
- Patent Title (中): 参考缓冲电路
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Application No.: US12169977Application Date: 2008-07-09
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Publication No.: US07719345B2Publication Date: 2010-05-18
- Inventor: Yi-Hsien Cho , Yu-Hsin Lin
- Applicant: Yi-Hsien Cho , Yu-Hsin Lin
- Applicant Address: TW Hsin-Chu
- Assignee: Mediatek Inc.
- Current Assignee: Mediatek Inc.
- Current Assignee Address: TW Hsin-Chu
- Agency: Thomas, Kayden, Horstemeyer & Risley
- Main IPC: G05F1/10
- IPC: G05F1/10

Abstract:
A reference buffer circuit is disclosed, providing a reference voltage at an output node and comprising a closed-loop branch comprising an amplifier and first and second MOS transistors and an open-loop branch comprising third and fourth MOS transistors and a tracking circuit. The first MOS transistor has a gate coupled to an output terminal of the amplifier and a source coupled to a negative input terminal of the amplifier. The second MOS transistor is coupled to the source of the first MOS transistor. The third MOS transistor has a gate coupled to the output terminal and a source coupled to the output node. The fourth MOS transistor has a drain coupled to the source of the third MOS transistor. A gate voltage of the fourth MOS transistor tracks a drain voltage of the third MOS transistor through the tracking circuit.
Public/Granted literature
- US20080290934A1 REFERENCE BUFFER CIRCUITS Public/Granted day:2008-11-27
Information query
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