Invention Grant
US07719918B2 Semiconductor memory device having input/output sense amplification circuit with reduced junction loading and circuit layout area
失效
半导体存储器件具有输入/输出读出放大电路，具有减少的结点负载和电路布局面积
- Patent Title: Semiconductor memory device having input/output sense amplification circuit with reduced junction loading and circuit layout area
- Patent Title (中): 半导体存储器件具有输入/输出读出放大电路，具有减少的结点负载和电路布局面积
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Application No.: US11775929Application Date: 2007-07-11
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Publication No.: US07719918B2Publication Date: 2010-05-18
- Inventor: Ki Chon Park
- Applicant: Ki Chon Park
- Applicant Address: KR Kyoungki-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Kyoungki-do
- Agency: Ladas & Parry LLP
- Priority: KR10-2007-0016245 20070215
- Main IPC: G11C8/00
- IPC: G11C8/00
Abstract:
A semiconductor memory device includes a plurality of sense amplifiers that amplify data transferred from each of a couple of banks and output them as amplified signals; a controller configured to determine the output states of the amplified signals outputted from each of the couple of sense amplifiers and to output driving signals corresponding to the output amplified signals; and a driver configured to receive driving signals and to drive a global input/output line in response to the driving signals, wherein the couple of sense amplifiers share the one driver.
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