Invention Grant
US07721060B2 Method and apparatus for maintaining data density for derived clocking
有权
用于保持导出时钟的数据密度的方法和装置
- Patent Title: Method and apparatus for maintaining data density for derived clocking
- Patent Title (中): 用于保持导出时钟的数据密度的方法和装置
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Application No.: US10713563Application Date: 2003-11-13
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Publication No.: US07721060B2Publication Date: 2010-05-18
- Inventor: Robert M. Ellis
- Applicant: Robert M. Ellis
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Marger Johnson & McCollom, P.C.
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F13/00

Abstract:
Some embodiments of the invention implement point-to-point memory channels that virtually eliminate the need for mandatory synchronization cycles for a derived clocking architecture by tracking the number of data transitions on inbound and outbound data lanes to make sure the minimum number of transitions occur. Other embodiments of the invention perform data inversions to increase the likelihood of meeting the minimum data transition density. Still other embodiments are described in the claims.
Public/Granted literature
- US20050108489A1 Method and apparatus for maintaining data density for derived clocking Public/Granted day:2005-05-19
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