Invention Grant
- Patent Title: Execution optimization using a processor resource management policy saved in an association with an instruction group
- Patent Title (中): 使用与指令组关联的处理器资源管理策略进行执行优化
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Application No.: US11526190Application Date: 2006-09-22
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Publication No.: US07725693B2Publication Date: 2010-05-25
- Inventor: Bran Ferren , W. Daniel Hillis , Nathan P. Myhrvold , Clarence T. Tegreene , Lowell L. Wood, Jr.
- Applicant: Bran Ferren , W. Daniel Hillis , Nathan P. Myhrvold , Clarence T. Tegreene , Lowell L. Wood, Jr.
- Applicant Address: US WA Bellevue
- Assignee: Searete, LLC
- Current Assignee: Searete, LLC
- Current Assignee Address: US WA Bellevue
- Main IPC: G06F7/38
- IPC: G06F7/38 ; G06F9/00 ; G06F9/44 ; G06F15/00
Abstract:
Embodiments include a device and a method. In an embodiment, a device provides a resource manager operable to select a resource management policy likely to provide a substantially optimum execution of an instruction group by comparing an execution of the instruction group pursuant to a first resource management policy applied to a hardware resource and an execution of the instruction group pursuant to a second resource management policy applied to the hardware resource.
Public/Granted literature
- US20070067611A1 Processor resource management Public/Granted day:2007-03-22
Information query
