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US07725756B2 Method for generating programmable data rate from a single clock 有权
用于从单个时钟生成可编程数据速率的方法

Method for generating programmable data rate from a single clock
Abstract:
A method for generating a wide range of clock rates from a single clock. A delta is generated from a first clock signal and a second clock signal. An accumulative offset is generated from adding the delta to a previous accumulative offset for each clock period of the first clock signal. Whenever an overflow is encountered, the value of the accumulative offset is truncated. The second clock signal is interpolated between adjacent values.
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