Invention Grant
- Patent Title: Systematic yield in semiconductor manufacture
- Patent Title (中): 半导体制造系统产量
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Application No.: US11854000Application Date: 2007-09-12
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Publication No.: US07725864B2Publication Date: 2010-05-25
- Inventor: Paul H. Bergeron , Jason D. Hibbeler , Gustavo E. Tellez
- Applicant: Paul H. Bergeron , Jason D. Hibbeler , Gustavo E. Tellez
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Greenblum & Bernstein P.L.C.
- Agent Richard Kotulak
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
Three-dimensional structures are provided which improve manufacturing yield for certain structures in semiconductor devices. The three-dimensional structures take into account the interaction between an upper layer and a lower layer where the lower layer has a tendency to form a non-planar surface due to its design. Accordingly, design changes are performed to make structures more likely to function, either by forming a more planar surface on the lower layer or by compensating in the upper layer for the lack of planarity. The changes to improve manufacturing yield are made at the design stage rather than at the fabrication stage.
Public/Granted literature
- US20080059918A1 SYSTEMATIC YIELD IN SEMICONDUCTOR MANUFACTURE Public/Granted day:2008-03-06
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