Invention Grant
- Patent Title: Coreless thin substrate with embedded circuits in dielectric layers and method for manufacturing the same
- Patent Title (中): 介质层中嵌有电路的无芯薄基板及其制造方法
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Application No.: US11610309Application Date: 2006-12-13
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Publication No.: US07728234B2Publication Date: 2010-06-01
- Inventor: Chien-Hao Wang
- Applicant: Chien-Hao Wang
- Applicant Address: TW Kaohsiung
- Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee Address: TW Kaohsiung
- Agency: J.C. Patents
- Priority: TW95111566A 20060331
- Main IPC: H01R12/04
- IPC: H01R12/04 ; H05K1/11

Abstract:
A coreless thin substrate with embedded circuits in dielectric layers is provided. The substrate includes a plurality of first patterned dielectric layers with embedded circuits, and at least a second patterned dielectric layer with embedded conducting elements. The second patterned dielectric layer is disposed between the first patterned dielectric layers, such that the embedded conducting elements electrically conduct the circuits of the first patterned dielectric layers through thermal lamination. Thus, a conventional through-hole formation process after the thermal lamination is skipped, and the substrate has a thinner and flatter profile. In one embodiment, the first patterned dielectric layers are inkjet printed layers with negative images. Moreover, the embedded circuits are flush with and exposed from an upper surface and a lower surface of the corresponding first dielectric layers.
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