Invention Grant
- Patent Title: Multiple-gate transistor structure
- Patent Title (中): 多栅晶体管结构
-
Application No.: US10314249Application Date: 2002-12-06
-
Publication No.: US07728360B2Publication Date: 2010-06-01
- Inventor: Hao-Yu Chen , Yee-Chia Yeo , Fu-Liang Yang
- Applicant: Hao-Yu Chen , Yee-Chia Yeo , Fu-Liang Yang
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Thomas, Kayden, Horstemeyer & Risley
- Main IPC: H01L29/74
- IPC: H01L29/74

Abstract:
A multiple-gate transistor structure which includes a substrate, source and drain islands formed in a portion of the substrate, a fin formed of a semi-conducting material that has a top surface and two sidewall surfaces, a gate dielectric layer overlying the fin, and a gate electrode wrapping around the fin on the top surface and the two sidewall surfaces separating source and drain islands. In an alternate embodiment, a substrate that has a depression of an undercut or a notch in a top surface of the substrate is utilized.
Public/Granted literature
- US20040108523A1 Multiple-gate transistor structure and method for fabricating Public/Granted day:2004-06-10
Information query
IPC分类: