Invention Grant
- Patent Title: Semiconductor device and method of manufacturing the same
- Patent Title (中): 半导体装置及其制造方法
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Application No.: US11594975Application Date: 2006-11-09
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Publication No.: US07728409B2Publication Date: 2010-06-01
- Inventor: Michio Nemoto
- Applicant: Michio Nemoto
- Applicant Address: JP Tokyo
- Assignee: Fuji Electric Device Technology Co., Ltd.
- Current Assignee: Fuji Electric Device Technology Co., Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Rabin & Berdo, PC
- Priority: JP2005-326560 20051110
- Main IPC: H01L30/00
- IPC: H01L30/00

Abstract:
A semiconductor device formed by decreasing thickness of a substrate by grinding, and performing ion implantation. In a diode in which a P anode layer and an anode electrode are formed at a side of a right face of an N− drift layer, and an N+ cathode layer and a cathode electrode are formed at a side of a back face of the N− drift layer, an N cathode buffer layer is formed thick compared with the N+-type cathode layer between the N−-type drift layer and the N+ cathode layer, the buffer layer being high in concentration compared with the N− drift layer, and low compared with the N+ cathode layer. When a reverse bias voltage is applied, a depletion layer is stopped in the middle of the N cathode buffer layer, and thus prevented from reaching the N+ cathode layer, so that the leakage current is suppressed.
Public/Granted literature
- US20070108558A1 Semiconductor device and method of manufacturing the same Public/Granted day:2007-05-17
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