Invention Grant
US07729181B2 Semiconductor storage device using a bitline GND sensing scheme for a reduced real estate of pre-sense amplifier
有权
半导体存储设备使用位线GND感测方案,用于预读取放大器的减少的空间
- Patent Title: Semiconductor storage device using a bitline GND sensing scheme for a reduced real estate of pre-sense amplifier
- Patent Title (中): 半导体存储设备使用位线GND感测方案,用于预读取放大器的减少的空间
-
Application No.: US11653909Application Date: 2007-01-17
-
Publication No.: US07729181B2Publication Date: 2010-06-01
- Inventor: Keizo Morita , Shoichiro Kawashima
- Applicant: Keizo Morita , Shoichiro Kawashima
- Applicant Address: JP Tokyo
- Assignee: Fujitsu Microelectronics Limited
- Current Assignee: Fujitsu Microelectronics Limited
- Current Assignee Address: JP Tokyo
- Agency: Fujitsu Patent Center
- Priority: JP2006-234537 20060830
- Main IPC: G11C7/06
- IPC: G11C7/06

Abstract:
A semiconductor storage device comprises of a memory cell connected to a plate line and a bit line, a potential shift circuit which is connected to a bit line, temporarily changes in output voltage corresponding to the voltage change of the bit line when a voltage is applied to the plate line, a charge transfer circuit for transferring charge stored on the potential shift circuit corresponding to the temporary output voltage change of the potential shift circuit, and a charge accumulation circuit for generating a read voltage from a memory cell after accumulating the transferred charge.
Public/Granted literature
- US20080055960A1 Semiconductor storage device, and data reading method Public/Granted day:2008-03-06
Information query