Invention Grant
US07730282B2 Method and apparatus for avoiding data dependency hazards in a microprocessor pipeline architecture using a multi-bit age vector
失效
使用多位年龄向量在微处理器流水线架构中避免数据依赖性危害的方法和装置
- Patent Title: Method and apparatus for avoiding data dependency hazards in a microprocessor pipeline architecture using a multi-bit age vector
- Patent Title (中): 使用多位年龄向量在微处理器流水线架构中避免数据依赖性危害的方法和装置
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Application No.: US10916188Application Date: 2004-08-11
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Publication No.: US07730282B2Publication Date: 2010-06-01
- Inventor: James N. Dieffenderfer , Nathan S. Nunamaker , Sanjay B. Patel
- Applicant: James N. Dieffenderfer , Nathan S. Nunamaker , Sanjay B. Patel
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Thomas E. Tyson; Joscelyn G. Cockburn; Mark E. McBurney
- Main IPC: G06F9/00
- IPC: G06F9/00

Abstract:
A method and system for avoiding various hazards for instructions which are propagating through a microprocessor pipeline. When a plurality of instructions exist within the pipeline which read and write the same value, a vector is established to distinguish the older from the newer instructions. Further, before instructions are dispatched for execution, pointers are generated which identify the particular instruction which had the operand or parameter value needed. Accordingly, by monitoring both the recent vector and pointers, dated dependency hazards can be avoided.
Public/Granted literature
- US20060037023A1 Method and apparatus for avoiding data dependency hazards in a microprocessor pipeline architecture Public/Granted day:2006-02-16
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