Invention Grant
US07732276B2 Self-aligned patterning method by using non-conformal film and etch back for flash memory and other semiconductor applications
有权
通过使用非保形膜的自对准图案化方法,并对闪存和其他半导体应用进行回蚀
- Patent Title: Self-aligned patterning method by using non-conformal film and etch back for flash memory and other semiconductor applications
- Patent Title (中): 通过使用非保形膜的自对准图案化方法,并对闪存和其他半导体应用进行回蚀
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Application No.: US11796582Application Date: 2007-04-26
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Publication No.: US07732276B2Publication Date: 2010-06-08
- Inventor: Shenqing Fang , Jihwan Choi , Calvin Gabriel , Fei Wang , Angela Hui , Alexander Nickel , Zubin Patel , Phillip Jones , Mark Chang , Minh-Van Ngo
- Applicant: Shenqing Fang , Jihwan Choi , Calvin Gabriel , Fei Wang , Angela Hui , Alexander Nickel , Zubin Patel , Phillip Jones , Mark Chang , Minh-Van Ngo
- Applicant Address: US CA Sunnyvale
- Assignee: Spansion LLC
- Current Assignee: Spansion LLC
- Current Assignee Address: US CA Sunnyvale
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A method for fabricating a memory device with a self-aligned trap layer which is optimized for scaling is disclosed. In the present invention, a non-conformal film is deposited over the charge trapping layer to form a thick film on top of the core source/drain region and a pinch off and a void or a narrow channel at the top of the STI trench. An etch is performed on the non-conformal film to open pinch-off or widen the narrow channel in the non-conformal. The trapping layer is then completely or partially etched between the core cells. The non-conformal film is removed. And a top oxide is formed. The top oxide converts the remaining trap layer to oxide if the trapping layer is partially etched and thus isolate the trap layer.
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