Invention Grant
- Patent Title: Silicon wafers and method of fabricating the same
- Patent Title (中): 硅晶片及其制造方法
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Application No.: US11765973Application Date: 2007-06-20
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Publication No.: US07732352B2Publication Date: 2010-06-08
- Inventor: Young Hee Mun , Kun Kim , Chung Geun Koh , Seung Ho Pyi
- Applicant: Young Hee Mun , Kun Kim , Chung Geun Koh , Seung Ho Pyi
- Applicant Address: KR Icheon-si KR Gyeongsangbuk-do
- Assignee: Hynix Semiconductor Inc.,Siltron Inc.
- Current Assignee: Hynix Semiconductor Inc.,Siltron Inc.
- Current Assignee Address: KR Icheon-si KR Gyeongsangbuk-do
- Agency: Marshall, Gerstein & Borun LLP
- Priority: KR2003-62283 20030905
- Main IPC: H01L21/324
- IPC: H01L21/324 ; H01L21/322

Abstract:
By using a two-step RTP (rapid thermal processing) process, the wafer is provided which has an ideal semiconductor device region secured by controlling fine oxygen precipitates and OiSFs (Oxidation Induced Stacking Fault) located on the surface region of the wafer. By performing the disclosed two-step rapid thermal process, the distribution of defects can be accurately controlled and an ideal device active zone can be formed up to a certain distance from the surfaces of the wafer. In addition, it is possible to maximize the internal gettering (IG) efficiency by enabling the oxygen precipitates and the bulk stacking faults to have constant densities in the depth direction in an internal region of the wafer, that is, the bulk region. In order to obtain the constant concentration profile of the oxygen precipitates and the bulk stacking faults in the bulk region, the wafer is subjected to the aforementioned two-step rapid thermal process in a predetermined mixed gas atmosphere.
Public/Granted literature
- US20070298523A1 SILICON WAFERS AND METHOD OF FABRICATING THE SAME Public/Granted day:2007-12-27
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