Invention Grant
- Patent Title: Non-volatile semiconductor memory device and process of manufacturing the same
- Patent Title (中): 非易失性半导体存储器件及其制造方法
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Application No.: US12367590Application Date: 2009-02-09
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Publication No.: US07732873B2Publication Date: 2010-06-08
- Inventor: Toshitake Yaegashi , Koki Ueno
- Applicant: Toshitake Yaegashi , Koki Ueno
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2004-148163 20040518
- Main IPC: H01L29/76
- IPC: H01L29/76
Abstract:
In device isolation trenches, a first device-isolation insulator film is formed to have recesses thereon and a second device-isolation insulator film is formed in the recesses. The uppermost portions at both ends of the first device-isolation insulator film are located higher than the uppermost portions at both ends of the second device-isolation insulator film.
Public/Granted literature
- US20090149011A1 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND PROCESS OF MANUFACTURING THE SAME Public/Granted day:2009-06-11
Information query
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