Invention Grant
- Patent Title: Rectifier circuit
- Patent Title (中): 整流电路
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Application No.: US11062831Application Date: 2005-02-23
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Publication No.: US07732945B2Publication Date: 2010-06-08
- Inventor: Kunihiko Gotoh , Daisuke Yamazaki
- Applicant: Kunihiko Gotoh , Daisuke Yamazaki
- Applicant Address: JP Kawasaki
- Assignee: Fujitsu Limited
- Current Assignee: Fujitsu Limited
- Current Assignee Address: JP Kawasaki
- Agency: Arent Fox LLP
- Priority: JP2004-287606 20040930
- Main IPC: H03K3/00
- IPC: H03K3/00 ; H03K3/64

Abstract:
Disclosed is a rectifier circuit that realizes a low threshold voltage without using a process step to enable reduction in cost and in variation of devices. An NMOS transistor has a threshold voltage. In the transistor, a voltage to be rectified is inputted to a second node, and a rectified voltage is outputted to a first node. A threshold voltage generator is connected to a gate of the transistor and the first node. The generator generates a voltage and outputs it to the gate of the transistor. The voltage is a voltage which is elevated by the threshold voltage with respect to a voltage of the first node and is decreased by a microvoltage sufficiently small with respect to the threshold voltage. Thus, when the voltage of the second node is decreased by the microvoltage or more with respect to that of the first node, the transistor is turned on.
Public/Granted literature
- US20060076837A1 Rectifier circuit Public/Granted day:2006-04-13
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