Invention Grant
- Patent Title: Impedance adjustment circuit
- Patent Title (中): 阻抗调节电路
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Application No.: US12379464Application Date: 2009-02-23
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Publication No.: US07733120B2Publication Date: 2010-06-08
- Inventor: Hiromu Kato , Masahiro Takeuchi
- Applicant: Hiromu Kato , Masahiro Takeuchi
- Applicant Address: JP Kawasaki, Kanagawa
- Assignee: NEC Electronics Corporation
- Current Assignee: NEC Electronics Corporation
- Current Assignee Address: JP Kawasaki, Kanagawa
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2008-044382 20080226
- Main IPC: H03K17/16
- IPC: H03K17/16 ; H03K19/003

Abstract:
Disclosed is an impedance adjustment circuit including a comparator and a resistor control circuit. The comparator compares the resistance value of an external resistor and that of a replica resistor that forms a replica of a terminal resistor. The resistor control circuit includes a replica resistor control counter, a resistor-under-adjustment control signal holding circuit and a monitor circuit. The replica resistor control counter counts up and down based on the comparison result by the comparator to output a control signal to the replica resistor. The resistor-under-adjustment control signal holding circuit holds a control signal that is delivered to the terminal resistor. The monitor circuit receives the state of the counter and an output of the retention circuit and, in case the difference between the count state of the replica resistor control counter and an output of the resistor-under-adjustment control signal holding circuit is within a preset range, delivers the output of the resistor-under-adjustment control signal holding circuit as an input to the resistor-under-adjustment control signal holding circuit.
Public/Granted literature
- US20090212816A1 Impedance adjustment circuit Public/Granted day:2009-08-27
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