Invention Grant
US07733150B2 Method and apparatus for adaptive clock phase control for LSI power reduction 有权
用于LSI功率降低的自适应时钟相位控制的方法和装置

Method and apparatus for adaptive clock phase control for LSI power reduction
Abstract:
Methods and apparatus for distributing a clock signal to a digital circuit provide for: producing a clock signal; and delaying, advanced, or leaving the clock signal unchanged to produce an output clock signal as a function of a control signal, wherein an amount of delay or advancement between the clock signal and the output clock signal (phase difference) is a function of time variant changes in a magnitude of a power supply voltage to the digital circuit.
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