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US07733252B2 Method and apparatus for delay and combining circuitry 有权
延迟和组合电路的方法和装置

Method and apparatus for delay and combining circuitry
Abstract:
A system for signal processing is provided. A sampling delay system generates a plurality of sampling delay values. A plurality of programmable delays each receives one of the sample delay values. A plurality of sample and hold units, each coupled to one of the programmable delays, generates a sample of a received signal in response to an input from the programmable delay.
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