Invention Grant
US07733716B2 Signal masking method, signal masking circuit, and semiconductor integrated circuit
失效
信号掩蔽法,信号屏蔽电路和半导体集成电路
- Patent Title: Signal masking method, signal masking circuit, and semiconductor integrated circuit
- Patent Title (中): 信号掩蔽法,信号屏蔽电路和半导体集成电路
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Application No.: US12126358Application Date: 2008-05-23
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Publication No.: US07733716B2Publication Date: 2010-06-08
- Inventor: Kouji Mizutani
- Applicant: Kouji Mizutani
- Applicant Address: JP Yokohama
- Assignee: Fujitsu Microelectronics Limited
- Current Assignee: Fujitsu Microelectronics Limited
- Current Assignee Address: JP Yokohama
- Agency: Arent Fox LLP.
- Priority: JP2007-138219 20070524
- Main IPC: G11C7/00
- IPC: G11C7/00 ; G11C8/00

Abstract:
A signal masking circuit includes a detection circuit, a delayed read data strobe signal generation circuit, a gating circuit, a counting circuit, and a masking circuit. The detection circuit detects a period of a logic “L” of a read data strobe signal. The gating circuit gates a delayed read data strobe signal, and generates a first masked read data strobe signal. The counting circuit counts the falls of the first masked read data strobe signal until the count reaches a predetermined number, and generates a masking signal for masking the first masked read data strobe signal. The masking circuit masks the first masked read data strobe signal, and outputs a second masked read data strobe signal.
Public/Granted literature
- US20080291757A1 SIGNAL MASKING METHOD, SIGNAL MASKING CIRCUIT, AND SEMICONDUCTOR INTEGRATED CIRCUIT Public/Granted day:2008-11-27
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