Invention Grant
US07735035B1 Method and system for creating a boolean model of multi-path and multi-strength signals for verification
有权
用于创建用于验证的多路径和多强度信号的布尔模型的方法和系统
- Patent Title: Method and system for creating a boolean model of multi-path and multi-strength signals for verification
- Patent Title (中): 用于创建用于验证的多路径和多强度信号的布尔模型的方法和系统
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Application No.: US11444971Application Date: 2006-05-31
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Publication No.: US07735035B1Publication Date: 2010-06-08
- Inventor: Kei-Yong Khoo , Mitchell Hines , Chih-Chang Lin
- Applicant: Kei-Yong Khoo , Mitchell Hines , Chih-Chang Lin
- Applicant Address: US CA San Jose
- Assignee: Cadence Design Systems, Inc.
- Current Assignee: Cadence Design Systems, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Vista IP Law Group LLP
- Main IPC: G06F9/45
- IPC: G06F9/45 ; G06F17/50
Abstract:
A system, method, computer program product for verification and equivalence checking. In one approach, the system, method, and computer program product analyzes the switching paths in a manner consistent with circuit functionality to provide a complete application which can verify the complex characteristics in the circuits to the accurate RTL model function, including FPGA, ROM Arrays, RAM circuits, and other custom integrated circuit designs.
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