Invention Grant
- Patent Title: Multilayer printed wiring board with filled viahole structure
- Patent Title (中): 多层印刷线路板,带有通孔结构
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Application No.: US12164710Application Date: 2008-06-30
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Publication No.: US07737366B2Publication Date: 2010-06-15
- Inventor: Seiji Shirai , Kenichi Shimada , Motoo Asai
- Applicant: Seiji Shirai , Kenichi Shimada , Motoo Asai
- Applicant Address: JP Ogaki-shi
- Assignee: Ibiden Co., Ltd.
- Current Assignee: Ibiden Co., Ltd.
- Current Assignee Address: JP Ogaki-shi
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP10-045396 19980226; JP10-045397 19980226; JP10-045398 19980226; JP10-045399 19980226
- Main IPC: H01R12/04
- IPC: H01R12/04 ; H05K1/11

Abstract:
A multilayer printed wiring board having a multilayered structure including multiple conductor circuit layers and multiple interlaminar insulative layers, the conductor layers having one or more conductor circuit portions, the interlaminar insulative resin layers including the outermost interlaminar insulative resin layer forming the outermost layer of the multilayered structure, a filled-viahole formed in the outermost interlaminar insulative resin layer and made of one or more metal plating filling and completely closing a hole formed through the outermost interlaminar insulative resin layer, the metal plating of the filled-viahole extending out of the hole and having a substantially flat surface, the filled-viahole electrically connected to the conductor circuit portion in the conductor circuit layers, and a solder bump formed on the substantially flat surface of the filled-viahole.
Public/Granted literature
- US20080264686A1 MULTILAYER PRINTED WIRING BOARD WITH FILLED VIAHOLE STRUCTURE Public/Granted day:2008-10-30
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