Invention Grant
US07737488B2 Blocking dielectric engineered charge trapping memory cell with high speed erase
有权
阻塞具有高速擦除的介电工程电荷捕获存储单元
- Patent Title: Blocking dielectric engineered charge trapping memory cell with high speed erase
- Patent Title (中): 阻塞具有高速擦除的介电工程电荷捕获存储单元
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Application No.: US11845321Application Date: 2007-08-27
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Publication No.: US07737488B2Publication Date: 2010-06-15
- Inventor: Sheng Chih Lai , Hang-Ting Lue , Chien Wei Liao
- Applicant: Sheng Chih Lai , Hang-Ting Lue , Chien Wei Liao
- Applicant Address: TW Hsinchu
- Assignee: Macronix International Co., Ltd.
- Current Assignee: Macronix International Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes Beffel & Wolfeld LLP
- Main IPC: H01L29/792
- IPC: H01L29/792 ; H01L21/336
Abstract:
A band gap engineered, charge trapping memory cell includes a charge trapping element that is separated from a gate by a blocking layer of metal doped silicon oxide material having a medium dielectric constant, such as aluminum doped silicon oxide, and separated from the semiconductor body including the channel by an engineered tunneling dielectric.
Public/Granted literature
- US20090039416A1 BLOCKING DIELECTRIC ENGINEERED CHARGE TRAPPING MEMORY CELL WITH HIGH SPEED ERASE Public/Granted day:2009-02-12
Information query
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