Invention Grant
US07737701B2 Method and tester for verifying the electrical connection integrity of a component to a substrate 有权
用于验证部件到基板的电连接完整性的方法和测试器

Method and tester for verifying the electrical connection integrity of a component to a substrate
Abstract:
A method for verifying the integrity of the electrical connection between at least one signal path of a substrate and at least one respective contact of a component mounted on the substrate is disclosed. The method includes generating a step signal on one of the at least one signal path connected to a respective contact, and capturing a capacitively coupled signal due to the step signal at the contact. The method further includes determining the integrity of the electrical connection from a characteristic of the capacitively coupled signal or a response signal obtained from the capacitively coupled signal. A tester in which the method is implemented is also disclosed.
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